Difference between revisions of "Exploit Methods/Userspace execution"
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Once an attacker has gain control over the instruction pointers, it must be aimed somewhere. The place where attackers have the most control over memory layout tends to be in userspace, so it has been natural to place malicious code in userspace and have the kernel redirection execution there. (Frequently known as "ret2usr".) | Once an attacker has gain control over the instruction pointers, it must be aimed somewhere. The place where attackers have the most control over memory layout tends to be in userspace, so it has been natural to place malicious code in userspace and have the kernel redirection execution there. (Frequently known as "ret2usr".) | ||
For more details, see [[Exploit Methods/Userspace data usage|Userspace access]], as that | For more details, see [[Exploit Methods/Userspace data usage|Userspace access]], as that can be superset of userspace execution under some emulation situations. | ||
= Examples = | = Examples = | ||
Revision as of 19:47, 15 September 2016
Details
Once an attacker has gain control over the instruction pointers, it must be aimed somewhere. The place where attackers have the most control over memory layout tends to be in userspace, so it has been natural to place malicious code in userspace and have the kernel redirection execution there. (Frequently known as "ret2usr".)
For more details, see Userspace access, as that can be superset of userspace execution under some emulation situations.
Examples
- See nearly every other exploit example listed under other Exploit Methods and Bug Classes.
Mitigations
- hardware segregation: SMEP (x86), PXN (arm)
- compiler instrumentation to set high bit on function calls
- emulate memory segregation via separate page tables (e.g. PAX_MEMORY_UDEREF)
Right now, the upstream options available for Privileged eXecute Never (e.g. PXN, SMEP) are:
| CPU | Feature Name | |
|---|---|---|
| ARM | v7 (32-bit) non-LPAE | CONFIG_CPU_SW_DOMAIN_PAN (since Linux v4.3) |
| v7 (32-bit) LPAE (e.g. Cortex-A7, A15+) | hardware PXN (since Linux v3.19) | |
| v8.0+ (64-bit) | hardware PXN | |
| x86 | pre-Ivy-Bridge | nothing (could use PCID?) |
| Ivy-Bridge+ (since May 2012) | hardware PXN (SMEP) | |
| s/390 | hardware PXN (Address Spaces) | |
| powerpc | nothing? | |
| MIPS | nothing (could use ASID switching?) | |