[PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems

[Jason Gunthorpe]

On Thu, Jun 08, 2017 at 07:22:59PM +0100, Alan Cox wrote:
> > > > +	outb(0x80, 0xCC);
> > > > +
> > > > +	/* Make sure the above write is completed */
> > > > +	wmb();  
> > > 
> > > Why the wmb(). It doesn't do what the comment says! Also this code is x86
> > > specific
> > > 
> > >   
> > 
> > Memory barrier to enforce the order so that the outb() is
> > completed, which ensures that the LPC clocks are running before
> > sending any TPM command.
>
> wmb() doesn't do that. It merely ensures that the write has been posted
> to the fabric. If as I suspect your LPC bus implements outb() as a
> non-posted write you don't need the wmb().

I think the point here is to bootstrap the sleeping LPC bus clock
before a TPM command is issued, presumably because the auto-wakeup circuit
is busted or something.

For that purpose all that should be required is strong ordering of the
outb relative to the other TPM commands at the LPC interface FIFO. I
also think the wmb is not needed because outb is already defined to be
strongly in order with respect to writel/readl ?

Jason
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